Microchip Technology /ATSAME54N20A /GMAC /DCFGR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DCFGR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FBLDO0 (ESMA)ESMA 0 (ESPA)ESPA 0RXBMS 0 (TXPBMS)TXPBMS 0 (TXCOEN)TXCOEN 0DRBS0 (DDRP)DDRP

Description

DMA Configuration Register

Fields

FBLDO

Fixed Burst Length for DMA Data Operations:

ESMA

Endian Swap Mode Enable for Management Descriptor Accesses

ESPA

Endian Swap Mode Enable for Packet Data Accesses

RXBMS

Receiver Packet Buffer Memory Size Select

TXPBMS

Transmitter Packet Buffer Memory Size Select

TXCOEN

Transmitter Checksum Generation Offload Enable

DRBS

DMA Receive Buffer Size

DDRP

DMA Discard Receive Packets

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